• Part: PE83512
  • Description: DC - 1500 MHz Low Power UltraCMOS
  • Manufacturer: pSemi
  • Size: 288.43 KB
Download PE83512 Datasheet PDF
pSemi
PE83512
PE83512 is DC - 1500 MHz Low Power UltraCMOS manufactured by pSemi.
Description The PE83512 is a high-performance static Ultra CMOS™ prescaler with a fixed divide ratio of 4. Its operating frequency range is DC to 1500 MHz. The PE83512 operates on a nominal 3 V supply and draws only 14 m A. It is packaged in a small 8-lead plastic MSOP and is ideal for frequency scaling and clock generation solutions. The PE83512 is manufactured on Peregrine’s Ultra CMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of Ga As with the economy and integration of conventional CMOS. Figure 1. Functional Schematic Diagram DC - 1500 MHz Low Power Ultra CMOS™ Divide-by-4 Prescaler Military Operating Temperature Range Features - DC to 1500 MHz operation - Fixed divide ratio of 4 - Low-power operation: 14 m A typical @ 3.0 V - Ultra small package: 8-lead MSOP Figure 2. Package Type 8-lead MSOP Table 1. Electrical Specifications (ZS = ZL = 50 Ω) 2.85 V ≤ VDD ≤ 3.15 V; -55° C ≤ TA ≤ 125° C, unless otherwise specified Parameter Supply Voltage Conditions Minimum Typical 3.0 7 14 Maximum 3.15 12 25 1500 +10 +10 +10 Units V m A m A MHz d Bm d Bm d Bm d Bm OUTB Disabled Supply Current1 OUTB Enabled Input Frequency (FIN) 100 MHz ≤ Fin ≤ 1200 MHz -55°C ≤ TA ≤ 85°C 100 MHz ≤ Fin ≤ 1200 MHz 85°C ≥ TA ≥ 125°C 1200 MHz < Fin ≤ 1500 MHz -55°C ≤ TA ≤ 85°C DC < Fin ≤ 1500 MHz DC -5 0 +5 +2 Input Power (PIN) Output Power Document No. 70-0117-03 │ .psemi. ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 7 Free Datasheet http://../ Product Specification Figure 3. Pin Configuration (Top View) Electrostatic Discharge (ESD) Precautions When handling this Ultra CMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 3. Latch-Up Avoidance Unlike conventional CMOS devices,...